algorithm decoder
英 [ˈælɡərɪðəm ˌdiːˈkəʊdə(r)]
美 [ˈælɡərɪðəm ˌdiːˈkoʊdər]
网络 算法解码器
双语例句
- Rate Estimation Algorithm for Distributed Video Coding on Decoder
分布式视频解码器端的码率估计算法 - Fast searching algorithm for the decoder of the unitary space-time modulation
一种酉空时调制的快速搜索译码算法 - On simplified algorithm of RS decoder in DVB-H
DVB-H中RS译码器的简化算法研究 - ISAR Imaging of Multiple Targets Using Time-Chirp Distribution Rate Estimation Algorithm for Distributed Video Coding on Decoder
基于时间-调频率分布的多目标ISAR成像分布式视频解码器端的码率估计算法 - Reference Frame Compression Algorithm and Hardware Design for Video Decoder
解码器中的参考帧压缩算法及其硬件设计 - Density profile, pressure profile Rate Estimation Algorithm for Distributed Video Coding on Decoder
密度分布图，压力分布图分布式视频解码器端的码率估计算法 - At the same time, the author studied the MPEG-4 video codec algorithm, transplanted the MPEG-4 video decoder to the Blackfin processor and did lots of optimization work.
同时研究了MPEG-4视频编解码算法，将基于MPEG-4的视频解码器移植到Blackfin处理器上并进行了大量的优化工作。 - Aiming at the convolutional code with long encoding restriction we adopt the Fano sequential decoding algorithm to implement the decoder.
针对编码约束度比较大的卷积码，采用Fano序列译码算法来实现译码。 - A Study on the MPEG/ AUDIO Layer ⅲ Coding Algorithm and the Realization of the Decoder
MPEG/AUDIOLayerⅢ编解码算法研究与解码的DSP软件实现 - The Double-readout Trace-back Algorithm for Viterbi Decoder and Its Complementation in ASIC
维特比译码的双读出回溯算法及ASIC实现 - Fast Algorithm Study on DTMF Software Decoder
DTMF信号软件解码快速算法的研究 - This paper introduces the principles and features of MPEG-4 general audio coding technology, in detail and discusses modification and optimization methods of key decoding algorithm. Implementation of decoder and player under Windows OS is presented.
本文分析MPEG-4通用音频编码技术的算法原理及技术特点，讨论了关键解码算法的改进和优化方法，设计实现了基于Windows环境的解码播放器。 - The Viterbi algorithm, proposed in 1967 by Viterbi, is a maximum-likelihood algorithm for convolutional codes. The Viterbi decoder attempts to find the maximum-likelihood function of the decoded code word against received code word.
在1967年，Viterbi提出了卷积码的Viterbi泽码算法，它是一种卷积码的最大似然译码算法，通过寻找译码器接收序列和卷积编码器的输出序列的最大似然函数来得出译码结果。 - In this paper, the key algorithm of the digital TV source decoder, audio decoding, has been researched and realized on the real-time operation system μ C/ OS-II.
在软件方面，本文着重论述了数字电视信源解码所涉及的音频核心解码算法在嵌入式实时操作系统μC/OS-II上的具体实现。 - Starting with the study of the video coding theory and algorithm in H.263 standard, a software decoder with self-determination copyright corresponding to H.263/H.
263视频编码的原理和算法，设计并开发了具有自主版权的H.263／H。 - Min_Sum algorithm is used for the decoder of the architecture in this paper, due to low complexity.
与BP算法相比，MinSum算法具有复杂度低的优点，因此选择了MinSum作为实现译码算法。 - Self-adaptive algorithm for an end Turbo decoder based on chaos control
基于混沌控制的自适应Turbo码译码改进算法 - Log_ MAP Algorithm and Its Implementation of Turbo Decoder
Turbo译码器的logMAP算法及其实现 - This article focuses on the optimization of architecture for the soft output viterbi algorithm ( SOVA) decoder of Turbo code.
分析TurboCode的软输出维特比（SOVA）译码器的结构优化方法。 - This blind equalization algorithm can work with a noncoherent decoder, resulting in a low-complexity and completely blind method for decoding in the present of ISI.
这种均衡器可以和非相干检测器配合使用，从而在存在码间干扰的情况下实现低复杂度的完全盲均衡。 - This thesis investigated the implementation of the modified Euclidean ( ME) algorithm which was extensively used in RS decoder and proposed a low complexity structure of ME algorithm by using pipelining technique and multiplexing finite field multiplier.
论文探讨了RS解码器中广泛使用的改进的欧氏算法（ME）的实现，利用流水线技术和复用有限域乘法器的方法设计了一种低复杂度的ME算法实现结构。 - The algorithm at the decoder according to the changes in intensity of the video scene to provide adaptive I-frame error recovery strategies, and to match during the macro block adjacent macroblocks according to the state to provide adaptive search strategy.
该算法在解码端可以根据视频场景的变化剧烈程度提供自适应的I帧错误遮蔽策略，并能在进行宏块匹配时能根据相邻宏块状态提供自适应的搜索策略。 - According to simulation results of SISO algorithm, we design the TPC decoder by FPGA and divide them into small modules according to the top-to-down design, and that makes then design more flexible.
根据对算法的仿真结果，设计TPC译码器的FPGA实现。设计时，采用自顶向下的设计方法，将系统划分为许多小模块，使系统的设计更为灵活。 - The implementation algorithm of the Viterbi decoder key modules are expatiated after thorough study of Viterbi algorithm.
在对Viterbi译码算法深入研究的基础上，重点研究了Viterbi译码器核心组成模块的电路实现算法。 - Then the detailed analysis of two important decoding algorithms, named MAX-LOG-MAP and the MAX-LOG-MAP, has been shown in this thesis. MAX-LOG-MAP algorithm based on the decoder is beneficial to greatly cut operations of multiplication, and reduce the complexity of hardware design.
本文详细分析两个重要的译码算法MAP和MAX-LOG-MAP，并以MAX-LOG-MAP算法为依据详细阐述了译码器的设计，减少大量的乘法运算，降低硬件实现的复杂度。 - By using the method of motion information replication in encoder, this scheme effectively reduce calculation consumption and error accumulation. And by employing the adaptive algorithm of bicubic interpolation in decoder, it could recover the missing residual so that to increase estimation precision. 2.
该方案在编码端利用运动信息复制的方法有效减少编码计算量并降低误差积累，解码端则采用自适应双线性插值法对丢失残差进行恢复，提高估值精度。 - The logical architecture, protocol, the encoder algorithm, the decoder algorithm and the electronics Specification of the TMDS which is the core of the DVI and means Transition minimized differential signal are described in particular in this paper.
详细介绍和分析了作为接口核心内容的TMDS最小化差分信号的逻辑架构、通信协议的编码算法、解码算法。 - Next, according to the characteristics of quasi-cyclic matrix, a new encoding circuit using feedback shift registers is proposed and implemented by FPGA. Thirdly, the decoding algorithm and decoder implementation are studied.
接着，针对生成矩阵的准循环特性，提出了一种新的基于反馈移位寄存器的编码电路，并用FPGA进行了实现。再次，论文对译码算法和译码器实现进行了研究。